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ISO 9141 Physical Interface
also the input generating the internal reset signal. Applying a logic low level on this pin resets the circuit, all the internal flip
flops are reset, and drivers TD1/2 are switched on.
VBAT
C 1
VSUP
GATE
1 MHz oscillator
Voltage reference
Charge pump
-
N channel
LDMOS
SOURCE
V D D
10mA
and biasing
generator
V D D
+
P channel
MOS
VDD
C 2
C 3
10mF 100nF
VDD
C Reset
LVR
reset
Comparator
-
+
Figure 4. Voltage Regulator Block Diagram
5
ISO 9141 Physical Interface
This interface module is fully compatible with the ISO 9141 norm describing the diagnosis line. It includes one transmitter
(pin K) and two receivers (pins K and AM).
The input stages consist of high-voltage CMOS triggers. The thresholds are ratiometric to VSUP. A ground referenced current
source (2.5μA typ.) pulls down the input when unconnected.
When a negative voltage is applied on the K or AM lines, the input current is internally limited by a 2k Ω resistor (typ.) in series
with a diode.
A current limitation allows the transmitter to drive any capacitive load and protects against short circuit to the battery voltage.
An overtemperature protection shuts the driver down when the junction temperature exceeds 150°C (typ). After shutdown by
the overtemperature protection, the driver can be switched on again if the junction temperature has decreased below the
threshold and by applying an off/on command, coming from the demodulator in configurations A and B, or directly applied on
the input Tx in configuration C (see Table 4 ).
The electromagnetic emission is reduced because of the voltage slew rate control (5V/μs typ.).
MC33690 Standalone Tag Reader Circuit, Rev. 5
8
Freescale Semiconductor
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